E&R Highlights Laser and Plasma Technologies for Advanced Packaging at SEMICON Taiwan 2025

KAOHSIUNG, Aug. 29, 2025 /PRNewswire/ — As AI, HPC, and 5G drive semiconductor innovation, advanced packaging has become the next strategic focus. Yole Group projects the market to exceed USD 50 billion by 2025, with fan-out panel-level packaging (FOPLP) growing more than 15% annually.

E&R Highlights Laser and Plasma Technologies for Advanced Packaging at SEMICON Taiwan 2025

E&R Engineering (TPE: 8027) will present its latest laser and plasma solutions at SEMICON Taiwan 2025, covering FOPLP, Through-Silicon Via (TSV), Through-Glass Via (TGV), and plasma dicing. These fully integrated process technologies help customers manage high I/O density, warpage control, and ultra-fine features.

FOPLP Solutions

E&R provides a full equipment portfolio, including laser marking, dicing, plasma cleaning, laser debonding, and ABF drilling, supporting panels up to 700×700 mm. With precision control, the systems maintain productivity while stably processing substrates with warpage up to 16 mm.

TSV – Through-Silicon Via Applications

With the rise of 3D packaging and advanced memory, TSV has become essential for high-density integration. E&R delivers via drilling, cleaning, and debonding solutions that combine laser and plasma to achieve accurate via profiles, low defectivity, and reliable interconnects across wafer sizes and materials.

Glass Substrate Solutions

In the emerging glass core substrate segment, E&R’s laser modification achieves > 0.9 via circularity, 10:1 aspect ratios, and 1,500 vias/sec drilling. The solution supports CoPoS and ABF substrate applications, enabling high-performance, high-yield manufacturing. In partnership with E-core partners, E&R will also showcase a complete metallization – enabled glass substrate process flow at the show.

Complete Packaging and Process Support

Designed, manufactured, and qualified in Taiwan with components from leading U.S. and European suppliers, E&R equipment has shipped over 500 units worldwide. Its solutions are widely adopted in FCBGA, FCCSP, fan-out, and wafer-level packaging by major OSATs and IDMs. The company also expanded its Flip Chip BGA portfolio, offering Pre-Flip Chip Die Bond Plasma Cleaning, Pre-Molding/Underfill Plasma Cleaning and Laser Marking for traceability. In 2025, E&R introduced a fully automated high-power burn-in solution, supporting up to 3,000W test environments.

E&R invites industry partners to visit us and explore next-generation packaging and dicing technologies with our technical team.

SEMICON Taiwan 2025 – E&R Engineering Corp.